📍 Santa Clara, California·Est. 1969
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AMD

Cross-stack AI silicon vendor. Instinct MI355X datacenter GPUs (288 GB HBM3e, GA Q3 2025) compete with NVIDIA Blackwell; MI400 series announced for 2026 (vs. Vera Rubin). ROCm 7.2 open software stack is closing on CUDA — vLLM CI pass rate jumped from 37% to 93% across late 2025. Ryzen AI Max+ 395 client NPU (50 TOPS). EPYC 9005 "Turin" + Venice (Zen 6, 256 cores, H2 2026) pair full-width AVX-512 with the new x86 ACE matrix-AI standard AMD co-authored with Intel.

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📋About AMD

Updated June 15, 2026

AMD (Advanced Micro Devices) is one of the world's largest semiconductor companies, founded in 1969 in Sunnyvale, California, and today headquartered in Santa Clara. Under CEO Lisa Su (since 2014), AMD has gone from struggling x86 second-source to credible cross-stack AI competitor — the only company with at-scale silicon across all three major AI compute surfaces: datacenter GPU, server CPU, and client NPU.

AMD's AI hardware portfolio is built around four product lines. The Instinct datacenter accelerators — currently the MI355X (CDNA 4 architecture, 288 GB HBM3e, generally available Q3 2025) — are AMD's direct response to NVIDIA's Blackwell, with the announced MI400 series (MI430X / MI440X / MI455X) targeting NVIDIA's Vera Rubin generation in 2026. ROCm is AMD's open, permissively licensed software stack (currently 7.2.2) for AI compute on Instinct and select Radeon GPUs — the deliberate counterweight to NVIDIA's CUDA moat, and the vLLM CI pass rate jumping from 37% (Nov 2025) to 93% (Jan 2026) is the most-cited proof point of its maturation. Ryzen AI brings on-device AI to laptops and mini-desktops via the XDNA 2 NPU; the Ryzen AI Max+ 395 (Strix Halo, January 2025) hits 50 TOPS NPU and 126 TOPS system-wide with up to 128 GB unified memory. And EPYC server CPUs — currently the 9005 "Turin" generation, with Venice (Zen 6, up to 256 cores, H2 2026) — pair full-width AVX-512 with the new x86 AI Compute Extensions (ACE) standard AMD co-authored with Intel via the x86 Ecosystem Advisory Group in April 2026.

Major 2025-2026 customer wins validate AMD's position as the credible #2 datacenter AI vendor: Oracle Cloud Infrastructure went generally available on MI355X (with a 50,000-GPU MI450 commitment starting Q3 2026), Microsoft Azure is running MI300X in production, OpenAI signed a 6-gigawatt multi-year supply deal in October 2025, and Meta and xAI have publicly committed to MI350-class deployments. With annual revenue around $26 billion and roughly 28,000 employees, AMD remains a fraction of NVIDIA's scale — but the cross-stack footprint plus the ACE standards play give it a structural position no other challenger has.

🛠️Products & Tools (4)

AMD InstinctEnterpriseAI Infrastructure

AMD's datacenter AI accelerator line. Currently shipping the MI355X (CDNA 4, 288 GB HBM3e, 8 TB/s); MI400 series (MI430X / MI440X / MI455X) announced at CES 2026 to compete with NVIDIA Vera Rubin. Major customer wins: Oracle Cloud (130k+ MI355X cluster), Microsoft Azure, OpenAI 6 GW supply deal, Meta, xAI.

AMD ROCmOpen SourceAI Infrastructure

AMD's open, permissively-licensed AI compute software stack — the deliberate counterweight to NVIDIA's CUDA moat. Currently ROCm 7.2.2; bundles vLLM 0.10.1; vLLM CI pass rate jumped from 37% (Nov 2025) to 93% (Jan 2026), the most-cited proof point of its maturation. Native PyTorch on Windows + Linux now in public preview.

AMD Ryzen AIPaidAI Infrastructure

AMD's on-device client-AI platform. Ryzen AI Max+ 395 (Strix Halo, January 2025) hits 50 TOPS NPU and 126 TOPS system-wide via the XDNA 2 architecture, with up to 128 GB unified memory enabling local inference of models up to ~70 billion parameters. Copilot+ PC certified. Ryzen AI 400 series announced at CES 2026.

AMD EPYC AIEnterpriseAI Infrastructure

AMD's server CPU line for AI inference. Currently shipping EPYC 9005 "Turin" (Zen 5, full-width AVX-512 with VNNI/BF16/FP16). Venice (Zen 6) launches H2 2026: TSMC 2nm, up to 256 cores / 512 threads, 1.6 TB/s memory bandwidth, ~1.7x perf vs Turin. The CPU-side companion to the new x86 ACE matrix-AI standard AMD co-authored with Intel.